Programmable Logic
Exploring FPGA architecture, LUTs, routing resources, configuration and open-source implementation flows.
DIGITAL HARDWARE / OPEN SOURCE / EDA
Building at the hardware–software boundary.
I'm Khush Vasudeo Patil — exploring FPGA architecture, RTL design, ASIC physical design, open-source EDA and AI-assisted hardware engineering.
hardware-flow
$ ./build_hardware.sh
[01] parsing RTL................ OK
[02] synthesis................. OK
[03] place & route............. OK
[04] timing analysis........... OK
[05] bitstream / GDS............ READY
$ echo "open the stack"
Open source hardware.
01
About
I work across the layers that turn a hardware idea into something that can actually run on silicon or programmable logic.
My interests span RTL design, FPGA architecture, synthesis, place & route, ASIC physical design, embedded systems and open-source EDA.
I'm particularly interested in the parts of the stack normally hidden behind commercial tools — device databases, routing resources, bitstreams, synthesis decisions and physical implementation.
I'm also exploring how LLMs, reinforcement learning and agentic systems can be applied to hardware engineering and EDA workflows.
FPGA Toolchains
Open-source synthesis, placement, routing, device databases and bitstreams.
ASIC Design
RTL → synthesis → physical design → GDSII.
AI × Hardware
Exploring AI-assisted RTL and EDA workflows.
02
Hardware Stack
01ArchitectureSystem design
→
02RTL / HDLVerilog / SystemVerilog
→
03SynthesisLogic optimization
→
04ImplementationPlace & route
→
05SiliconBitstream / GDSII
RTL → GDS
Working with open-source digital implementation flows and the complete path from RTL to physical design.
Computer Architecture
Interested in RISC-V, SoCs, AXI interfaces, accelerators and hardware/software co-design.
03
Selected Work
A selection of hardware, FPGA, ASIC and open-source engineering work.
OPEN SOURCE / FPGA
01
Open FPGA Toolchains
Exploring and contributing to the ecosystem around open-source FPGA development, including synthesis, device databases, placement, routing and bitstream generation.
Explore ecosystem ↗
ASIC / PHYSICAL DESIGN
02
RTL → GDS Experiments
Digital designs taken through synthesis and physical implementation using open-source ASIC tooling and SKY130-based flows.
View repositories ↗
DIGITAL DESIGN
03
Hardware Accelerators
Exploring architectures such as systolic arrays, memory structures and hardware accelerators from RTL through implementation.
View work ↗
EMBEDDED / RTL
04
Embedded Hardware Systems
FPGA-based hardware/software systems involving peripherals, AXI interfaces, processors and real-time data paths.
View work ↗
AI × HARDWARE
05
AI for Hardware Engineering
Investigating LLMs, reinforcement learning and agentic workflows for RTL generation, reasoning, optimization and EDA automation.
Explore work ↗
ARCHITECTURE
06
RISC-V & Computer Architecture
Exploring open instruction sets, processors, peripherals, SoC integration and hardware/software co-design.
View repositories ↗
IOT / EMBEDDED
07
Heroku WebSocket-Webhook IoT Bridge
Node.js server on Heroku enabling real-time bidirectional communication between ESP32 and webhook events. ESP32 acts as WebSocket client via ESP32WebSocketClient; a lightweight web frontend monitors the data path live.
View repository ↗
04
Technical Stack
HDL / RTL
VerilogSystemVerilogVeryl
FPGA
YosysnextpnrProject X-RayAPIOVivado
ASIC / EDA
OpenLaneOpenROADYosysSKY130MagicKLayout
Verification
VerilatorIcarus VerilogGTKWave
Programming
CC++PythonBash
Architecture
RISC-VAXISoCMicroBlaze
AI × Hardware
LLMsReinforcement LearningAgentsAI × EDA
Operating Systems
LinuxBSDWindowsUnixROS
05
Open Source
I believe semiconductor tooling should be inspectable, reproducible and accessible.
I'm particularly interested in open-source FPGA and ASIC ecosystems where engineers can understand what happens underneath commercial abstractions — and I contribute back where I can.
FPGA TOOLCHAIN
openXC7 — Xilinx Open-Source Flow
Spartan-7 support across prjxray-db, nextpnr-xilinx, and APIO; validated end-to-end on Arty S7-25.
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FPGA IDE
icestudio — iCE40 FPGA IDE
Board definitions and device support for VSD Squadron FM; verified on physical hardware with FTDI FT232H.
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